Timing Optimization Through Clock Skew Scheduling
This work focuses on optimizing the timing of large-scale, high-performance, digital synchronous systems. A particular emphasis is placed on algorithms for n... »

On-Chip Inductance in High Speed Integrated Circuits
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Power Distribution Networks With On-Chip Decoupling Capacitors
Power Distribution Networks with On-Chip Decoupling Capacitors »

Power Distribution Networks in High Speed Integrated Circuits
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Timing Optimization For High-Speed Digital Circuits
This work focuses on optimizing the timing of large-scale, high-performance, digital synchronous systems. A particular emphasis is placed on algorithms for n... »

Three-Dimensional Integrated Circuit Design
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Multi-Voltage Cmos Circuit Design
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Three-Dimensional Integrated Circuit Design
3-D Integrated Circuit Design »